TensorCore.si Blog
Tensor Cores, GPUs and AI chips, explained
In-depth guides, generation-by-generation breakdowns and analysis of the hardware that trains and runs modern AI.
2:4 Structured Sparsity Explained: How Sparse Tensor Cores Double AI Throughput
What 2:4 structured sparsity is, how NVIDIA and AMD tensor cores use it to skip half the math, why spec sheets list "with sparsity"…
Mixed Precision Training Explained: FP16, BF16 and FP8 on Tensor Cores
How mixed precision training works, why it makes training up to several times faster on tensor cores, the difference between FP16 with loss scaling…
How to Run an LLM Locally: Ollama, LM Studio and llama.cpp (Step by Step)
A beginner-friendly guide to running large language models on your own computer with Ollama, LM Studio or llama.cpp: hardware you need, which model to…
How Much VRAM Do I Need to Run an LLM? Formula, Table and Examples
A simple formula to work out how much VRAM a large language model needs: weights, KV cache and overhead. Includes a table for 8B…
Intelligence Explosion Explained: Recursive Self-Improvement and the Singularity
The intelligence explosion is the idea that AI able to improve itself could rapidly become superintelligent. Where the idea came from, how recursive self-improvement…
What Is AI Alignment? The Alignment Problem Explained Simply
AI alignment means making AI systems pursue the goals their designers and users actually intend. What the alignment problem is, examples like reward hacking,…
GPU Memory Bandwidth Explained: Why It Decides LLM Speed
What GPU memory bandwidth is, how to calculate it from bus width and memory speed, why it limits how fast large language models generate…
GDDR7 vs HBM3E vs HBM4: GPU Memory Types Explained
GDDR7 and HBM are the two kinds of memory used on GPUs. How each works, their bandwidth and capacity, why AI data center GPUs…
Google Ironwood TPU (TPU v7) Explained: Specs, Pods and How It Compares
Ironwood is Google's seventh-generation TPU, its first designed mainly for inference. Ironwood's specs, 192 GB of HBM per chip, 9,216-chip pods, how it compares…
Cerebras WSE-3 Explained: The Wafer-Scale AI Chip With 900,000 Cores
Cerebras builds an AI chip the size of a whole silicon wafer. How the WSE-3 works, its 4 trillion transistors, 900,000 cores and 44…