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Data · Last updated November 2026

AI GPU and accelerator specs database

Memory, bandwidth and Tensor Core or matrix throughput for 28 AI accelerators and GPUs, from NVIDIA V100 to Rubin, AMD MI250X to MI455X, Intel Gaudi 3, AWS Trainium and Google TPUs, plus the workstation and desktop cards people use for local AI. Every number is per chip, dense (no sparsity) and taken from the vendor's own datasheets or documentation.

28 acceleratorsNVIDIA · AMD · Intel · AWS · GoogleOfficial sourcesFree CSV download
Key takeaways
  • The largest memory per chip is 432 GB of HBM4 on AMD Instinct MI455X. NVIDIA Rubin, B300, GB300 and AMD MI355X each carry 288 GB.
  • The fastest memory is 23.3 TB/s on MI455X, followed by NVIDIA Rubin at 19.2 TB/s (NVIDIA lowered this from an earlier 22 TB/s target in September 2026). Both are about 6 to 7 times an H100's 3.35 TB/s.
  • The highest dense FP4 throughput is about 40 PFLOPS on MI455X and 35 PFLOPS on Rubin, against 9 PFLOPS on B200.
  • From V100 (2017) to Rubin (2026), dense FP16 Tensor Core throughput grew 32 times (125 to 4,000 TFLOPS) while memory bandwidth grew about 21 times.
  • For local AI, the RTX 5090 (32 GB, 1.79 TB/s) has the most bandwidth of any desktop card, while DGX Spark trades bandwidth (0.27 TB/s) for 128 GB of unified memory.
What changed · 5 November 2026Expanded from 12 to 28 chips (Rubin, GB300, MI455X, Gaudi 3, Trainium3, RTX 5090 and more) and added vendor and class filters. Rubin bandwidth corrected to 19.2 TB/s and NVLink 6 to 3 TB/s per GPU after NVIDIA's September 2026 revision. Full changelog · How we report numbers

Compare every accelerator

Filter by vendor and click any column to sort. Bars show each chip relative to the leader in the sorted column.

AI accelerator specifications per chip, dense throughput
V100 SXM2NVIDIAFirst Tensor Cores2017VoltaTSMC 12 nm · HBM2320.90125––7.8300300NVLink 2
A100 SXM 80GBNVIDIATF32, BF16, 2:4 sparsity2020AmpereTSMC 7 nm · HBM2e802.04312––19.5400600NVLink 3
H100 SXMNVIDIAFP8, Transformer Engine2022HopperTSMC 4N · HBM3803.359891,979–67700900NVLink 4
H200 SXMNVIDIAH100 compute, more memory2024HopperTSMC 4N · HBM3e1414.809891,979–67700900NVLink 4
B200 (HGX)NVIDIAFP4 and FP62024BlackwellTSMC 4NP · HBM3e1808.002,2504,5009,000371,0001,800NVLink 5
B300 (HGX)NVIDIABlackwell Ultra2025Blackwell UltraTSMC 4NP · HBM3e2888.002,2504,50013,5001.251,1001,800NVLink 5
H100 NVLNVIDIAPCIe card, bridged in pairs2023HopperTSMC 4N · HBM3943.908351,671–60400600NVLink bridge
GB200 (per GPU)NVIDIAGrace Blackwell, NVL72 racks2024BlackwellTSMC 4NP · HBM3e1868.002,5005,00010,000401,2001,800NVLink 5
GB300 (per GPU)NVIDIAGrace Blackwell Ultra, NVL72 racks2025Blackwell UltraTSMC 4NP · HBM3e2888.002,5005,00015,0001.251,4001,800NVLink 5
Rubin (per GPU)NVIDIAVera Rubin NVL72, first with HBM42026RubinTSMC 3 nm · HBM428819.204,00017,50035,00033–3,000NVLink 6
L40SNVIDIAInference and graphics card2023Ada LovelaceTSMC 4N · GDDR6480.86362733––35064PCIe 4.0
L4NVIDIA72 W low-profile inference card2023Ada LovelaceTSMC 4N · GDDR6240.30121242––7264PCIe 4.0
RTX PRO 6000 BlackwellNVIDIAWorkstation card, 96 GB2025BlackwellGB202 · GDDR7961.795001,0002,000–600128PCIe 5.0
GeForce RTX 5090NVIDIATop consumer card for local AI2025BlackwellGB202 · GDDR7321.79209.58381,676–575128PCIe 5.0
GeForce RTX 4090NVIDIAPrevious consumer flagship2022Ada LovelaceAD102 · GDDR6X241.01165.2660.6––45064PCIe 4.0
DGX Spark (GB10)NVIDIADesktop AI computer2025BlackwellGB10 · LPDDR5x unified1280.27––500–24025ConnectX-7
Instinct MI300XAMD192 GB in one package2023CDNA 3TSMC 5/6 nm · HBM31925.301,3072,615–163750896Infinity Fabric
Instinct MI325XAMDMI300X with HBM3e2024CDNA 3TSMC 5/6 nm · HBM3e2566.001,3072,615–1631,000896Infinity Fabric
Instinct MI355XAMDFP4 and FP62025CDNA 4TSMC N3P/N6 · HBM3e2888.002,5175,03310,06678.61,4001,075Infinity Fabric
Instinct MI250XAMDFrontier supercomputer GPU2021CDNA 2TSMC 6 nm · HBM2e1283.28383––95.7560800Infinity Fabric
Instinct MI455XAMDHelios racks, 432 GB HBM42026CDNA 5TSMC 2/3 nm · HBM443223.305,03320,13340,265––3,600UALink scale-up
Gaudi 3IntelEthernet built into the chip2024Gaudi 3TSMC 5 nm · HBM2e1283.701,6781,678––9001,20024× 200 GbE
Trainium2AWSTrn2 instances and UltraServers2024NeuronCore-v3HBM962.906671,299–––1,280NeuronLink
Trainium3AWSTrn3 UltraServers, 144 chips2025NeuronCore-v43 nm · HBM3e1444.906712,5172,517––2,560NeuronLink-v4
TPU v5pGoogleTraining pods of 8,960 chips2023TPU v5pHBM2e952.77459459–––1,200ICI
TPU Trillium (v6e)GooglePods of 256 chips2024TPU v6eHBM321.64918918–––800ICI
TPU Ironwood (TPU7x)GooglePods of 9,216 chips2025TPU7xHBM3e1927.382,3074,614–––1,200ICI
TPU v5eGoogleCost-efficient training and inference2023TPU v5eHBM2160.82197––––200ICI

All throughput is dense (without 2:4 sparsity); "with sparsity" figures on spec sheets are double these. FP64 uses Tensor Core or matrix FP64 where the chip has it (V100: vector FP64). B300 power is the approximate HGX figure. TPU power is not published, and TPU memory is listed in GiB as Google reports it. Chip-to-chip bandwidth is each vendor's quoted total per chip, so compare it within a vendor rather than across vendors. Per-GPU figures for GB200, GB300 and Rubin are NVIDIA's rack totals divided by 72; Rubin FP4 is the dense training figure (NVIDIA quotes 50 PFLOPS for inference with its adaptive compression). GeForce FP16 is shown with FP32 accumulate, which NVIDIA runs at half rate on consumer cards (330 and 419 TFLOPS with FP16 accumulate on the 4090 and 5090). RTX PRO 6000 and DGX Spark figures are half of NVIDIA's sparse ratings. Power for DGX Spark is the whole system. Desktop and workstation cards connect over PCIe, shown as total two-way bandwidth. A dash means the format is not supported or not published.

Head-to-head comparison

Pick two chips to see the ratio on every spec.


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How to read these numbers

Dense, not sparse

Vendors often headline "with sparsity" numbers, which assume half the weights are zero in a 2:4 pattern. Real models rarely run that way, so this table uses dense numbers.

Bandwidth often matters more

Generating tokens one at a time is memory-bound: an H100 needs about 295 FLOPs per byte to keep its Tensor Cores busy. For chatbots, memory size and bandwidth predict speed better than TFLOPS.

Peak is a ceiling

These are theoretical maximums at boost clock. Well-tuned large matrix multiplies reach roughly 60–80% of peak; whole training runs usually land lower.

Want the full method? Read how to read a GPU spec sheet, see why memory matters in what is HBM, or estimate what a model needs in the AI model GPU calculator.

Frequently asked questions

Which AI GPU has the most memory?

As of November 2026, AMD Instinct MI455X has the most memory per chip at 432 GB of HBM4. NVIDIA Rubin, B300 and GB300 and AMD MI355X each have 288 GB, AMD MI325X has 256 GB and Google Ironwood 192 GB.

How much faster is B200 than H100?

Per chip, B200 has about 2.3 times the dense FP16 and FP8 Tensor Core throughput of H100 (2,250 vs 989 TFLOPS FP16), adds FP4 at 9 PFLOPS dense, and has 2.4 times the memory bandwidth (8 vs 3.35 TB/s). Real speedups depend on the workload and software.

What is the difference between H100 and H200?

They share the same Hopper GPU and the same compute throughput. H200 replaces 80 GB of HBM3 at 3.35 TB/s with 141 GB of HBM3e at 4.8 TB/s, which helps large models and long contexts.

What are NVIDIA Rubin's specs?

Each Rubin GPU in a Vera Rubin NVL72 rack has 288 GB of HBM4 at 19.2 TB/s, 35 PFLOPS of dense NVFP4 for training (50 PFLOPS for inference), 17.5 PFLOPS of FP8, 4 PFLOPS of FP16/BF16, 33 TFLOPS of FP64 and 3 TB/s of NVLink 6. NVIDIA lowered the memory and NVLink figures from 22 TB/s and 3.6 TB/s in September 2026. Production shipments began in the second half of 2026.

Is the RTX 5090 or RTX PRO 6000 better for local AI?

Both have 1.79 TB/s of bandwidth, so they generate tokens at similar speed when a model fits. The RTX PRO 6000 has three times the memory (96 GB vs 32 GB), which lets it hold 70B-class models at 8-bit, and runs FP16 with FP32 accumulate at full rate. The RTX 5090 costs far less. Check a specific model in the VRAM calculator or read the best GPU for local LLMs.

Why are TPU FP4 and FP64 cells empty?

Google does not publish FP4 or FP64 matrix throughput for these TPUs, and TPUs are not designed for FP64 scientific computing. The table only shows figures the vendor has published.

Sources

  1. NVIDIA Tesla V100 datasheet
  2. NVIDIA A100 datasheet
  3. NVIDIA H100 product page and H200 product page
  4. NVIDIA HGX platform specifications (HGX B200 and B300)
  5. AMD Instinct MI300X, MI325X and MI355X product pages
  6. Google Cloud TPU7x (Ironwood) documentation, which also lists v5p and v6e per-chip specs
  7. NVIDIA Vera Rubin NVL72, GB300 NVL72 and GB200 NVL72 product pages; TechRadar on the Rubin bandwidth revision
  8. NVIDIA L40S, L4, RTX PRO 6000 Blackwell, GeForce RTX 5090 and DGX Spark product pages
  9. AMD Instinct MI400 Series and MI250X product pages
  10. Intel Gaudi 3 AI accelerator white paper
  11. AWS Neuron documentation: Trainium3 architecture, which also gives Trainium2 figures
  12. Google Cloud TPU v5e documentation

Cite this dataset

TensorCore.si Editorial. (2026, November). AI GPU and accelerator specs database. TensorCore.si. https://tensorcore.si/gpu-specs/

Journalists, researchers and AI assistants are welcome to quote these figures with a link to this page.